Formation of a tantalum-nitride layer

ABSTRACT

A method of forming a tantalum-nitride layer ( 204 ) for integrated circuit fabrication is disclosed. Alternating or co-reacting pulses of a tantalum containing precursor and a nitrogen containing precursor are provided to a chamber ( 100 ) to form layers ( 305, 307 ) of tantalum and nitrogen. The nitrogen precursor may be a plasma gas source. The resultant tantalum-nitride layer ( 204 ) may be used, for example, as a barrier layer. As barrier layers may be used with metal interconnect structures ( 206 ), at least one plasma anneal on the tantalum-nitride layer may be performed to reduce its resistivity and to improve film property.

BACKGROUND OF THE DISCLOSURE

[0001] 1. Field of the Invention

[0002] The present invention relates to formation of one or more barrierlayers and, more particularly to one or more barrier layers formed usingchemisorption techniques.

[0003] 2. Description of the Background Art

[0004] In manufacturing integrated circuits, one or more barrier layersare often used to inhibit diffusion of one or more materials in metallayers, as well as other impurities from intermediate dielectric layers,into elements underlying such barrier layers, such as transistor gates,capacitor dielectrics, transistor wells, transistor channels, electricalbarrier regions, interconnects, among other known elements of integratedcircuits.

[0005] Though a barrier layer may limit to prevent migration of unwantedmaterials into such elements, its introduction creates an interface atleast in part between itself and one or more metal layers. For subhalf-micron (0.5 μm) semiconductor devices, microscopic reaction at aninterface between metal and barrier layers can cause degradation ofintegrated circuits, including but not limited to increased electricalresistance of such metal layers. Accordingly, though barrier layers havebecome a component for improving reliability of interconnectmetallization schemes, it is desirable to mitigate “side effects” causedby introduction of such barrier layers.

[0006] Compounds of refractory metals such as, for example, nitrides,borides, and carbides are targets as diffusion barriers because of theirchemical inertness and low resistivities (e.g., sheet resistivitiestypically less than about 200 μΩ-cm). In particular, borides such as,including but not limited to titanium diboride (TiB₂), have been used asa barrier material owing to their low sheet resistivities (e.g.,resistivities less than about 150 μΩ-cm).

[0007] Boride barrier layers are conventionally formed using chemicalvapor deposition (CVD) techniques. For example, titanium tetrachloride(TiCl₄) may be reacted with diborane (B₂H₆) to form titanium diboride(TiB₂) using CVD. However, when Cl-based chemistries are used to formboride barrier layers, reliability problems can occur. In particular,boride layers formed using CVD chlorine-based chemistries typically havea relatively high chlorine (Cl) content, namely, chlorine contentgreater than about 3%. A high chlorine content is undesirable becausemigrating chlorine from a boride barrier layer into adjacentinterconnection layer may increase contact resistance of suchinterconnection layer and potentially change one or more characteristicsof integrated circuits made therewith.

[0008] Therefore, a need exists for barrier layers for integratedcircuit fabrication with little to no side effects owing to theirintroduction. Particularly desirable would be a barrier layer useful forinterconnect structures.

SUMMARY OF THE INVENTION

[0009] An aspect of the present invention is film deposition forintegrated circuit fabrication. More particularly, at least one elementfrom a first precursor and at least one element from a second precursoris chemisorbed on a surface. The at least one element from the firstprecursor and the at least one element from the second precursor arechemisorbed to provide a tantalum-nitride film. This sequence may berepeated to increase tantalum-nitride layer thickness. This type ofdeposition process is sometimes called atomic layer deposition (ALD).Such a tantalum-nitride layer may be used as a barrier layer.

[0010] Another aspect is forming the tantalum-nitride layer using inpart annealing of at least one tantalum-nitride sublayer. This annealingmay be done with a plasma.

[0011] Another aspect is using a plasma source gas as a nitrogenprecursor. The plasma source gas may be used to provide a plasma, whichmay be sequentially reacted or co-reacted with a tantalum containingprecursor.

[0012] These and other aspects of the present invention will be moreapparent from the following description.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The teachings of the present invention can be readily understoodby considering the following detailed description in conjunction withthe accompanying drawings, in which:

[0014]FIGS. 1 and 4 depict schematic illustrations of exemplary portionsof process systems in accordance with one or more integrated circuitfabrication aspects of the present invention;

[0015]FIGS. 2a-2 c depict cross-sectional views of a substrate structureat different stages of integrated circuit fabrication;

[0016]FIGS. 3a-3 c depict cross-sectional views of a substrate atdifferent stages of chemisorption to form a barrier layer; and

[0017]FIG. 5 depicts a cross-sectional view of a substrate structure atdifferent stages of integrated circuit fabrication incorporating one ormore tantalum-nitride barrier sublayers post plasma anneal.

DETAILED DESCRIPTION

[0018]FIG. 1 depicts a schematic illustration of a wafer processingsystem 10 that can be used to form one or more tantalum-nitride barrierlayers in accordance with aspects of the present invention describedherein. System 10 comprises process chamber 100, gas panel 130, controlunit 110, along with other hardware components such as power supply 106and vacuum pump 102. For purposes of clarity, salient features ofprocess chamber 100 are briefly described below.

[0019] Process Chamber

[0020] Process chamber 100 generally houses a support pedestal 150,which is used to support a substrate such as a semiconductor wafer 190within process chamber 100. Depending on process requirements,semiconductor wafer 190 can be heated to some desired temperature orwithin some desired temperature range prior to layer formation usingheater 170.

[0021] In chamber 100, wafer support pedestal 150 is heated by anembedded heating element 170. For example, pedestal 150 may beresistively heated by applying an electric current from an AC powersupply 106 to heating element 170. Wafer 190 is, in turn, heated bypedestal 150, and may be maintained within a desired process temperaturerange of, for example, about 20° C. to about 500° C.

[0022] Temperature sensor 172, such as a thermocouple, may be embeddedin wafer support pedestal 150 to monitor the pedestal temperature of 150in a conventional manner. For example, measured temperature may be usedin a feedback loop to control electric current applied to heatingelement 170 from power supply 106, such that wafer temperature can bemaintained or controlled at a desired temperature or within a desiredtemperature range suitable for a process application. Pedestal 150 mayoptionally be heated using radiant heat (not shown).

[0023] Vacuum pump 102 is used to evacuate process gases from processchamber 100 and to help maintain a desired pressure or desired pressurewithin a pressure range inside chamber 100. Orifice 120 through a wallof chamber 100 is used to introduce process gases into process chamber100. Sizing of orifice 120 conventionally depends on the size of processchamber 100.

[0024] Orifice 120 is coupled to gas panel 130 in part by valve 125. Gaspanel 130 is configured to receive and then provide a resultant processgas from two or more gas sources 135, 136 to process chamber 100 throughorifice 120 and valve 125. Gas sources 135, 136 may store precursors ina liquid phase at room temperature, which are later heated when in gaspanel 130 to convert them to a vapor-gas phase for introduction intochamber 100. Gas panel 130 is further configured to receive and thenprovide a purge gas from purge gas source 138 to process chamber 100through orifice 120 and valve 125.

[0025] Control unit 110, such as a programmed personal computer, workstation computer, and the like, is configured to control flow of variousprocess gases through gas panel 130 as well as valve 125 duringdifferent stages of a wafer process sequence. Illustratively, controlunit 110 comprises central processing unit (CPU) 112, support circuitry114, and memory 116 containing associated control software 113. Inaddition to control of process gases through gas panel 130, control unit110 may be configured to be responsible for automated control of otheractivities used in wafer processing—such as wafer transport, temperaturecontrol, chamber evacuation, among other activities, some of which aredescribed elsewhere herein.

[0026] Control unit 110 may be one of any form of general purposecomputer processor that can be used in an industrial setting forcontrolling various chambers and sub-processors. CPU 112 may use anysuitable memory 116, such as random access memory, read only memory,floppy disk drive, hard disk, or any other form of digital storage,local or remote. Various support circuits may be coupled to CPU 112 forsupporting system 10. Software routines 113 as required may be stored inmemory 116 or executed by a second computer processor that is remotelylocated (not shown). Bi-directional communications between control unit110 and various other components of wafer processing system 10 arehandled through numerous signal cables collectively referred to assignal buses 118, some of which are illustrated in FIG. 1.

[0027] Barrier Laver Formation

[0028]FIGS. 2a-2 c illustrate exemplary embodiment portions oftantalum-nitride layer formation for integrated circuit fabrication ofan interconnect structure in accordance with one or more aspects of thepresent invention. For purposes of clarity, substrate 200 refers to anyworkpiece upon which film processing is performed, and substratestructure 250 is used to denote substrate 200 as well as other materiallayers formed on substrate 200. Depending on processing stage, substrate200 may be a silicon semiconductor wafer, or other material layer, whichhas been formed on wafer 190 (shown in FIG. 1).

[0029]FIG. 2a, for example, shows a cross-sectional view of a substratestructure 250, having a dielectric layer 202 thereon. Dielectric layer202 may be an oxide, a silicon oxide, carbon-silicon-oxide, afluoro-silicon, a porous dielectric, or other suitable dielectric formedand patterned to provide contact hole or via 202H extending to anexposed surface portion 202T of substrate 200. More particularly, itwill be understood by those with skill in the art that the presentinvention may be used in a dual damascene process flow.

[0030]FIG. 2b illustratively shows tantalum-nitride layer 204 formed onsubstrate structure 250. Tantalum-nitride layer 204 is formed bychemisorbing monolayers of a tantalum containing compound and a nitrogencontaining compound on substrate structure 250.

[0031] Referring to FIG. 2c, after the formation of tantalum-nitridelayer 204, a portion of layer 204 may be removed by etching in awell-known manner to expose a portion 202C of substrate 200. Portion202C may be part of a transistor gate stack, a capacitor plate, a node,a conductor, or like conductive element. Next, contact layer 206 may beformed thereon, for example, to form an interconnect structure. Contactlayer 206 may be selected from a group of aluminum (Al), copper (Cu),tungsten (W), and combinations thereof.

[0032] Contact layer 206 may be formed, for example, using chemicalvapor deposition (CVD), physical vapor deposition (PVD), electroplating,or a combination thereof. For example, an aluminum (Al) layer may bedeposited from a reaction of a gas mixture containing dimethyl aluminumhydride (DMAH) and hydrogen (H₂) or argon (Ar) or other DMAH containingmixtures, a CVD copper layer may be deposited from a gas mixturecontaining Cu³⁰ ²(hfac)₂ (copper hexafluoro acetylacetonate), Cu³⁰ ²(fod)₂ (copper heptafluoro dimethyl octanediene), Cu⁺¹hfac TMVS (copperhexafluoro acetylacetonate trimethylvinylsilane), or combinationsthereof, and a CVD tungsten layer may be deposited from a gas mixturecontaining tungsten hexafluoride (WF₆). A PVD layer is deposited from acopper target, an aluminum target, or a tungsten target.

[0033] Moreover, layer 206 may be a refractory metal compound includingbut not limited to titanium (Ti), tungsten (W), tantalum (Ta), zirconium(Zr), hafnium (Hf), molybdenum (Mo), niobium (Nb), vanadium (V), andchromium (Cr), among others. Conventionally, a refactory metal iscombined with reactive species, such as for example chlorine (Cl) orfluorine (F), and is provided with another gas to form a refractorymetal compound. For example, titanium tetrachloride (TiCl₄), tungstenhexafluoride (WF₆), tantalum pentachloride (TaCl₅), zirconiumtetrachloride (ZrCl₄), hafnium tetrachloride (HfCl₄), molybdenumpentachloride (MoCl₅), niobium pentachloride (NbCl₅), vanadiumpentachloride (VCl₅), or chromium tetrachloride (CrCl₄) may be used as arefractory metal-containing compound gas.

[0034] Though layer 206 is shown as formed on layer 204, it should beunderstood that layer 204 may be used in combination with one or moreother barrier layers formed by CVD or PVD. Accordingly, layer 204 neednot be in direct contact with layer 206, but an intervening layer mayexist between layer 206 and layer 204.

[0035] Monolayers are chemisorbed by sequentially providing a tantalumcontaining compound and a nitrogen containing compound to a processchamber. Monolayers of a tantalum containing compound and a nitrogencontaining compound are alternately chemisorbed on a substrate 300 asillustratively shown in FIGS. 3a-3 c.

[0036]FIG. 3a depicts a cross-sectional view of an exemplary portion ofsubstrate 300 in a stage of integrated circuit fabrication, and moreparticularly at a stage of barrier layer formation. Tantalum layer 305is formed by chemisorbing a tantalum-containing compound on surfaceportion 300T of substrate 300 by introducing a pulse of a tantalumcontaining gas 135 (shown in FIG. 1) into process chamber 100 (shown inFIG. 1). Tantalum containing gas 135 (shown in FIG. 1) may be a tantalumbased organo-metallic precursor or a derivative thereof. Examples ofsuch precursors include but are not limited topentaethylmethylamino-tantalum (PEMAT; Ta[N(C₂H₅CH₃)₂]₄),pentadiethylamino-tantalum (PDEAT), pentadimethylamino-tantalum (PDMAT),and any and all of derivatives of PEMAT, PDEAT, or PDMAT. Other tantalumcontaining precursors include without limitation Ta(NMe₂)₅, Ta(NEt₂)₅,TBTDET (Ta(NEt₂)₃ or C₁₆H₃₉N₄Ta), tantalum halides for example TaX₅where X is florine (F), bromine (Br) or chlorine (Cl), and derivativesthereof.

[0037] Wafer 190 is maintained approximately below a thermaldecomposition temperature of a selected tantalum precursor or aderivative thereof to be used and maintained at a pressure ofapproximately less than 100 Torr. Additionally, wafer 190 may be heatedby heating element 170. An exemplary temperature range for precursorsidentified herein is approximately 20 to 400 degrees Celsius (° C.). Forexample, approximately 150 to 300° C. may be used for PEMAT.

[0038] Though temperatures below a thermal decomposition temperature maybe used, it should be understood that other temperatures, namely thoseabove a thermal decomposition temperature, may be used. An exampletemperature ranges above a thermal decomposition temperature isapproximately 400 to 600° C. Accordingly, some thermal decomposition mayoccur; however, the main, more than 50 percent, deposition activity isby chemisorption. More generally, wafer surface temperature needs to behigh enough to induce significant chemisorption of precursors instead ofphysisorption, but low enough to prevent significant decomposition ofprecursors. If the amount of decomposition during each precursordeposition is significantly less than a layer, then the primary growthmode will be ALD. Accordingly, such a film will tend to have ALDproperties. However, it is possible if a precursor significantlydecomposes, but an intermediate reactant is obtained preventing furtherprecursor decomposition after a layer of intermediate reactant isdeposited, then an ALD growth mode may still be obtained.

[0039] While not wishing to be bound by theory, it is believed that thistantalum-containing precursor combines tantalum atoms with one or morereactive species. During tantalum layer 305 formation, these reactivespecies form byproducts that are transported from process chamber 100 byvacuum system 102 while leaving tantalum deposited on surface portion300T. However, composition and structure of precursors on a surfaceduring atomic-layer deposition (ALD) is not precisely known. A precursormay be in an intermediate state when on a surface of wafer 190. Forexample, each layer may contain more than simply elements of tantalum(Ta) or nitrogen (N); rather, the existence of more complex moleculeshaving carbon (C), hydrogen (H), and/or oxygen (O) is probable.Additionally, a surface may saturate after exposure to a precursorforming a layer having more or less than a monolayer of either tantalum(Ta) or nitrogen (N). This composition or structure will depend onavailable free energy on a surface of wafer 190, as well as atoms ormolecules involved. Once all available sites are occupied by tantalumatoms, further chemisorption of tantalum is blocked, and thus thereaction is self-limiting.

[0040] After layer 305 of a tantalum containing compound is chemisorbedonto substrate 300, excess tantalum containing compound is removed fromprocess chamber 10 by vacuum system 102 (shown in FIG. 1). Additionally,a pulse of purge gas 138 (shown in FIG. 1) may be supplied to processchamber 10 to facilitate removal of excess tantalum containing compound.Examples of suitable purge gases include but are not limited to helium(He), nitrogen (N₂), argon (Ar), and hydrogen (H₂), among others, andcombinations thereof that may be used.

[0041] With continuing reference to FIGS. 3a-c and renewed reference toFIG. 1, after process chamber 100 has been purged, a pulse of ammoniagas (NH₃) 136 is introduced into process chamber 100. Process chamber100 and wafer 190 may be maintained at approximately the sametemperature and pressure range as used for formation of layer 305.

[0042] In FIG. 3b, a layer 307 of nitrogen is illustratively shown aschemisorbed on tantalum layer 305 at least in part in response tointroduction of ammonia gas 136. While not wishing to be bound bytheory, it is believed that nitrogen layer 307 is formed in a similarself-limiting manner as was tantalum layer 305. Each tantalum layer 305and nitrogen layer 307 in any combination and in direct contact with oneanother form a sublayer 309, whether or not either or both or neither isa monolayer. Though ammonia gas is used, other N containing precursorsgases may be used including but not limited to N_(x)H_(y) for x and yintegers (e.g., N₂H₄), N₂ plasma source, NH₂N(CH₃)₂, among others.

[0043] After an ammonia gas compound is chemisorbed onto tantalum layer305 on substrate 300 to form nitrogen monolayer 307, excess ammonia gascompound is removed from process chamber 10 by vacuum system 102, andadditionally, a pulse of purge gas 138 may be supplied to processchamber 10 to facilitate this removal.

[0044] Thereafter, as shown in FIG. 3c, tantalum and nitrogen layerdeposition in an alternating sequence may be repeated with interspersedpurges until a desired layer 204 thickness is achieved. Tantalum-nitridelayer 204 may, for example, have a thickness in a range of approximately0.0002 microns (2 Å) to about 0.05 microns (500 Å), though a thicknessof approximately 0.001 microns (10 Å) to about 0.005 microns (50 Å) maybe a sufficient barrier. Moreover, a tantalum-nitride layer 204 may beused as a thin film insulator or dielectric, or may be used as aprotective layer for example to prevent corrosion owing to layer 204being relatively inert or non-reactive. Advantageously, layer 204 may beused to coat any of a variety of geometries.

[0045] In FIGS. 3a-3 c, tantalum-nitride layer 204 formation is depictedas starting with chemisorption of a tantalum containing compound onsubstrate 300 followed by chemisorption of a nitrogen containingcompound. Alternatively, chemisorption may begin with a layer of anitrogen containing compound on substrate 300 followed by a layer of atantalum containing compound.

[0046] pulse time for each pulse of a tantalum containing compound, anitrogen containing compound, and a purge gas is variable and depends onvolume capacity of a deposition chamber 100 employed as well as vacuumsystem 102 coupled thereto. Similarly, time between each pulse is alsovariable and depends on volume capacity of process chamber 100 as wellas vacuum system 102 coupled thereto. However, in general, wafer 190surface must be saturated by the end of a pulse time, where pulse timeis defined as time a surface is exposed to a precursor. There is somevariability here, for example (1) a lower chamber pressure of aprecursor will require a longer pulse time; (2) a lower precursor gasflow rate will require a longer time for chamber pressure to rise andstabilize requiring a longer pulse time; and (3) a large-volume chamberwill take longer to fill, longer for chamber pressure to stabilize thusrequiring a longer pulse time. In general, precursor gases should notmix at or near the wafer surface to prevent co-reaction (a co-reactiveembodiment is disclosed elsewhere herein), and thus at least one gaspurge or pump evacuation between precursor pulses should be used toprevent mixing.

[0047] Generally, a pulse time of less than about 1 second for atantalum containing compound and a pulse time of less than about 1second for a nitrogen containing compound is typically sufficient tochemisorb alternating monolayers that comprise tantalum-nitride layer204 on substrate 300. A pulse time of less than about 1 second for purgegas 138 is typically sufficient to remove reaction byproducts as well asany residual materials remaining in process chamber 100.

[0048] Sequential deposition as described advantageously provides goodstep coverage and conformality, due to using a chemisorption mechanismfor forming tantalum-nitride layer 204. With complete or near completesaturation after each exposure of wafer 190 to a precursor, each ofuniformity and step coverage is approximately 100 percent. Becauseatomic layer deposition is used, precision controlled thickness oftantalum-nitride layer 204 may be achieved down to a single layer ofatoms. Furthermore, in ALD processes, since it is believed that onlyabout one atomic layer may be absorbed on a topographic surface per“cycle,” deposition area is largely independent of the amount ofprecursor gas remaining in a reaction chamber once a layer has beenformed. By “cycle,” it is meant a sequence of pulse gases, includingprecursor and purge gases, and optionally one or more pump evacuations.Also, by using ALD, gas-phase reactions between precursors is minimizedto reduce generation of unwanted particles.

[0049] Co-Reaction

[0050] Though it has been described to alternate tantalum and nitrogencontaining precursors and purging in between as applied in a sequentialmanner, another embodiment is to supply tantalum and nitrogen containingprecursors simultaneously. Thus, pulses of gases 135 and 136, namely,tantalum and nitrogen containing compounds, are both applied to chamber100 at the same time. An example is PEMAT and NH₃, though othertantalum-organic and nitrogen precursors may be used. Step coverage andconformality is good at approximately 95 to 100 percent for each.Moreover, deposition rate is approximately 0.001 to 0.1 microns persecond. Because a co-reaction is used, purging between sequential pulsesof alternating precursors is avoided, as is done in ALD.

[0051] Wafer surface temperature is maintained high enough to sustainreaction between two precursors. This temperature may be belowchemisorption temperature of one or both precursors. Accordingly,temperature should be high enough for sufficient diffusion of moleculesor atoms.

[0052] Wafer surface temperature is maintained low enough to avoidsignificant decomposition of precursors. However, more decomposition ofprecursors may be acceptable for co-reaction than for sequentiallyreacting precursors in an ALD process. In general, wafer 190 surfacediffusion rate of molecules or atoms should be greater than precursors'reaction rate which should be greater precursors'decomposition rate.

[0053] For all other details, the above-mentioned description forsequentially applied precursors applies to co-reaction processing.

[0054] Plasma Anneal

[0055] After forming one or more combinations of layers 305 and 307,substrate structure 250 may be plasma annealed. Referring to FIG. 4,there is illustratively shown a schematic diagram of an exemplaryportion of a process system 10P in accordance with an aspect of thepresent invention. Process system 10P is similar to process system 10,except for additions of one or more RF power supplies 410 and 412,showerhead 400, gas source 405, and matching network(s) 411. Notably, aseparate plasma process system may be used; however, by using a CVD/PVDprocess system 10P, less handling of substrate structure 250 isinvolved, as layer 204 may be formed and annealed in a same chamber 100.

[0056] Showerhead 400 and wafer support pedestal 150 provide in partspaced apart electrodes. An electric field may be generated betweenthese electrodes to ignite a process gas introduced into chamber 100 toprovide a plasma 415. In this embodiment, argon is introduced intochamber 100 from gas source 405 to provide an argon plasma. However, ifargon is used as a purge gas, gas source 405 may be omitted for gassource 138.

[0057] Conventionally, pedestal 150 is coupled to a source of radiofrequency (RF) power source 412 through a matching network 411, which inturn may be coupled to control unit 110. Alternatively, RF power source410 may be coupled to showerhead 400 and matching network 411, which inturn may be coupled to control unit 110. Moreover, matching network 411may comprise different circuits for RF power sources 410 and 412, andboth RF power sources 410 and 412 may be coupled to showerhead 400 andpedestal 150, respectively.

[0058] With continuing reference to FIG. 4 and renewed reference to FIG.3c, substrate structure 250 having one or more iterations ortantalum-nitride sublayers 309 is located in process chamber 401. Argon(Ar) gas from gas source 405 is introduced into chamber 401 to plasmaanneal substrate structure 250. While not wishing to be bound by theory,it is believed that plasma annealing reduces nitrogen content of one ormore sublayers 309 by sputtering off nitrogen, which in turn reducesresistivity. In other words, plasma annealing is believed to maketantalum-nitride layer 204 more tantalum-rich as compared to anon-plasma annealed tantalum-nitride layer 204. For example, a 1:1 Ta:Nfilm may be annealed to a 2:1 Ta:N film. Tantalum-nitride films having asheet resistance of approximately equal to or less than 1200micro-ohms-cm for 0.004 micron (40 Angstrom) films may be achieved.

[0059] It will be appreciated that other non-chemically reactive gaseswith respect to layer 204 may be used for physically displacing nitrogenfrom layer 204, including but not limited to neon (Ne), xenon (Xe),helium (He), and hydrogen (H₂). Generally, for a plasma-gas that doesnot chemically react with a tantalum-nitride film, it is desirable tohave a plasma-gas atom or molecule with an atomic-mass closer to N thanto Ta in order to have preferential sputtering of the N. However, achemically reactive process may be used where a gas is selected whichpreferentially reacts for removal of N while leaving Ta.

[0060] Referring to FIG. 5, there is illustratively shown a crosssectional view of layer 204 after plasma annealing in accordance with aportion of an exemplary embodiment of the present invention. Plasmaannealing may be done after formation of each nitrogen layer 307, or maybe done after formation of a plurality of layers 307. With respect tothe latter, plasma annealing may take place after approximately every0.003 to 0.005 microns (30 to 50 Angstroms) of layer 204 or afterformation of approximately every 7 to 10 sublayers 309. However, plasmaannealing may be done after formation of a sublayer 309, which isapproximately 0.0001 to 0.0004 microns (1 to 4 Angstroms).

[0061] Plasma annealing with argon may be done with a wafer temperaturein a range of approximately 20 to 450 degrees Celsius and a chamberpressure of approximately 0.1 to 50 Torr with a flow rate of argon in arange of approximately 10 to 2000 standard cubic centimeters per minute(sccm) with a plasma treatment time approximately equal to or greaterthan one second. Generally, a tantalum-nitride film should be annealedat a temperature, which does not melt, sublime, or decompose such atantalum-nitride film.

[0062] The specific process conditions disclosed in the abovedescription are meant for illustrative purposes only. Other combinationsof process parameters such as precursor and inert gases, flow ranges,pressure ranges and temperature ranges may be used in forming atantalum-nitride layer in accordance with one or more aspects of thepresent invention.

[0063] Although several preferred embodiments, which incorporate theteachings of the present invention, have been shown and described indetail, those skilled in the art can readily devise many other variedembodiments that still incorporate these teachings. By way of exampleand not limitation, it will be apparent to those skilled in the art thatthe above-described formation is directed at atomic layer CVD (ALCVD);however, low temperature CVD may be used as described with respect toco-reacting precursors. Accordingly, layers 305 and 307 need not bemonolayers. Moreover, it will be appreciated that the above describedembodiments of the present invention will be particularly useful informing one or more barrier layers for interconnects on semiconductordevices having a wide range of applications.

1. A method of film deposition for integrated circuit fabrication,comprising: chemisorbing at least one element from a first precursor ona wafer surface; chemisorbing at least one element from a secondprecursor on the wafer surface; and the at least one element from thefirst precursor and the at least one element from the second precursorchemisorbed to provide a tantalum-nitride film.
 2. The method of claim1, wherein the first precursor and the second precursor are deliveredsequentially to form the tantalum-nitride film.
 3. The method of claim1, wherein the first precursor and the second precursor are co-reactedto form the tantalum-nitride film.
 4. A method of film deposition forintegrated circuit fabrication, comprising: chemisorbing a first layeron a substrate, the first layer selected from a first tantalum layer anda first nitride layer; chemisorbing a second layer on the first layer,the second layer different from the first layer, the second layerselected from a second nitride layer and a second tantalum layer; thefirst layer and the second layer in combination providing atantalum-nitride layer; and plasma annealing the tantalum-nitride layerto remove nitrogen therefrom.
 5. The method of claim 4, wherein theplasma annealing is performed with a plasma source material chemicallynon-reactive to the tantalum-nitride layer and having an atomic masscloser to nitrogen than tantalum.
 6. The method of claim 4, wherein theplasma annealing is performed with plasma source material selected fromargon (Ar), xenon (Xe), helium (He), neon (Ne), hydrogen (H), nitrogen(N), and combinations thereof.
 7. The method of claim 4, furthercomprising sequentially repeating the chemisorbing of the first layerand the second layer along with interspersed plasma anneals to providethe tantalum-nitride layer.
 8. The method of claim 4, further comprisingsequentially repeating the chemisorbing of the first layer and thesecond layer to provide the tantalum-nitride layer.
 9. A method of filmdeposition for integrated circuit fabrication, comprising: providing aprocess system, the process system having a chamber; locating asubstrate in the process chamber; providing a first reactive gas to thechamber; chemisorbing a first layer on the substrate at least in partialresponse to the first reactive gas, the first layer selected from afirst tantalum layer and a first nitride layer; conditioning the chamberwith at least one of a purge gas or an evacuation; providing a secondreactive gas to the chamber; and chemisorbing a second layer on thefirst layer at least in partial response to the second reactive gas, thesecond layer different from the first layer, the second layer selectedfrom a second nitride layer and a second tantalum layer.
 10. The methodof claim 9, wherein the first reactive gas is a tantalum containing gas.11. The method of claim 10, wherein the tantalum containing gas is atantalum based organo-metallic precursor or a derivative thereof. 12.The method of claim 11, wherein the tantalum based organo-metallicprecursor is selected from pentaethylmethylamino-tantalum (PEMAT),pentadiethylamino-tantalum (PDEAT), pentadimethylamino-tantalum (PDMAT),and derivatives thereof.
 13. The method of claim 11, wherein thetantalum based organo-metallic precursor is selected from Ta(NMe₂)₅,Ta(NEt₂)₅, TBTDET, and tantalum halides.
 14. The method of claim 10,wherein the second reactive gas is a nitrogen containing gas.
 15. Themethod of claim 11, wherein the nitrogen containing gas is selected froman ammonia (NH₃) gas and a nitrogen plasma source gas.
 16. A method offilm deposition for integrated circuit fabrication, comprising:providing at least one process system, the at least one process systemhaving a chamber; locating a substrate in the chamber; providing atantalum containing gas to the chamber; chemisorbing a first layer onthe substrate at least in partial response to the tantalum containinggas; purging the chamber with at least one purge gas; providing anitrogen containing gas to the chamber; and chemisorbing a second layeron the first layer at least in partial response to the ammoniacontaining gas; purging the chamber with the at least one purge gas; andforming a plasma for annealing the second layer.
 17. The method of claim16, further comprising sequentially repeating the chemisorbing of thefirst layer, the purging of the chamber and the chemisorbing of thesecond layer to provide multiple tantalum-nitride sublayers.
 18. Themethod of claim 16, wherein the substrate is maintained approximatelybelow a thermal decomposition temperature of the tantalum containing gasfor chemisorbing of the first layer.
 19. The method of claim 18, whereinthe substrate is maintained approximately above a thermal decompositiontemperature of the tantalum containing gas for the chemisorbing of thefirst layer.
 20. The method of claim 18, wherein the purge gas isselected from the group of helium (He), neon (Ne), argon (Ar), hydrogen(H₂), nitrogen (N₂), and combinations thereof.
 21. The method of claim20, further comprising providing a plasma source gas to the chamber forignition to provide the plasma.
 22. The method of claim 21, wherein theplasma source gas and the at least one purge gas is argon (Ar).
 23. Themethod of claim 18, wherein the nitrogen containing gas is ammonia(NH₃).
 24. A method of forming a barrier layer structure and aninterconnect structure for use in integrated circuit fabrication,comprising: providing a substrate having an oxide layer thereon, whereinthe dielectric layer has recesses formed to expose portions of a surfaceof the substrate; forming at least one tantalum-nitride layer on atleast portions of the dielectric layer and the substrate surface, the atleast one tantalum-nitride layer formed using a sequential chemisorptionof tantalum containing and nitrogen containing precursor gases; etchingthrough portions of the at least one tantalum-nitride layer disposedwithin the recesses; and depositing at least one metal at least in partin the recesses; wherein the at least one tantalum-nitride layermitigates to prevents migration of elements of the at least one metal tothe dielectric layer.
 25. The method of claim 24, wherein the metal isselected from aluminum (Al), copper (Cu), tungsten (W) or a combinationthereof.
 26. The method of claim 24, wherein the at least one metal is arefractory metal selected from titanium (Ti), tungsten (W), vanadium(V), niobium (Nb), tantalum (Ta), zirconium (Zr), hafnium (Hf), chromium(Cr), and molybdenum (Mo).
 27. The method of claim 24, wherein thesequential chemisorption process comprises forming alternating layers oftantalum and nitrogen.
 28. The method of claim 27, wherein thealternating layers of tantalum and nitrogen are formed by sequentiallypulsing a tantalum containing gas and a nitrogen containing gas withpurging therebetween.
 29. A software routine on a computer storagemedia, the software routine, when executed, capable of causing a generalpurpose computer to control a process system to perform a method of thinfilm deposition comprising: forming a tantalum-nitride layer, thetantalum-nitride layer formed using a sequential chemisorption process,the chamber configured for the sequential chemisorption process to havea temperature of less than about 400° C., the sequential chemisorptionprocess comprising in part alternating pulses of a tantalum containinggas and a nitrogen containing gas.
 30. The software routine of claim 29,further comprising: controlling the process system to perform purgesbetween formation of a tantalum layer and a nitride layer.
 31. Thesoftware routine of claim 30, further comprising: controlling theprocess system to provide a plasma after forming the tantalum layer andthe nitride layer.
 32. A method of film deposition for integratedcircuit fabrication, comprising: co-reacting a tantalum containingprecursor and a nitrogen containing precursor to chemisorb a first layeron a wafer surface to provide a tantalum-nitride layer; and plasmaannealing the tantalum-nitride layer to remove nitrogen therefrom. 33.The method of claim 32, wherein the plasma annealing is performed with aplasma source material chemically non-reactive to the tantalum-nitridelayer and having an atomic mass closer to nitrogen than tantalum. 34.The method of claim 33, wherein the plasma annealing is performed withplasma source material selected from argon (Ar), xenon (Xe), helium(He), hydrogen (H), nitrogen (N), neon (Ne), and combinations thereof.35. A method of film deposition for integrated circuit fabrication,comprising: providing a chamber; providing a plasma source gascontaining nitrogen to the chamber; igniting the plasma source gas toprovide a plasma; providing a tantalum containing gas to the chamber;and co-reacting a the tantalum containing gas and the plasma tochemisorb on a wafer surface a tantalum-nitride layer.
 36. A method offilm deposition for integrated circuit fabrication, comprising:providing a chamber; providing a plasma source gas containing nitrogento the chamber; igniting the plasma source gas to provide a plasma;chemisorbing a nitrogen layer on a substrate; providing a precursor gascontaining tantalum to the chamber; and chemisorbing a tantalum layer onthe substrate; wherein the nitrogen layer and the tantalum layer incombination provide a tantalum-nitride layer.
 37. A method of filmdeposition for integrated circuit fabrication, comprising: providing aprocess system, the process system having a chamber; locating asubstrate in the process chamber; providing a tantalum containing gas tothe chamber; providing a nitrogen containing gas to the chamber; andchemisorbing tantalum and nitrogen from the tantalum containing gas andthe nitrogen containing gas to provide a tantalum-nitride layer on thesubstrate.
 38. The method of claim 37, further comprising plasmaannealing the tantalum-nitride layer.
 39. The method of claim 37,wherein the tantalum containing gas is a tantalum based organo-metallicprecursor or a derivative thereof.
 40. The method of claim 39, whereinthe tantalum based organo-metallic precursor is selected frompentaethylmethylamino-tantalum (PEMAT), pentadiethylamino-tantalum(PDEAT), pentadimethylamino-tantalum (PDMAT), and derivatives thereof.41. The method of claim 39 wherein the tantalum based organo-metallicprecursor is selected from Ta(NMe₂)₅, Ta(NEt₂)₅, TBTDET, and tantalumhalides.
 42. The method of claim 39 wherein the nitrogen containing gasis ammonia (NH₃).
 43. The method of claim 37, wherein the substrate ismaintained approximately below a thermal decomposition temperature ofthe tantalum containing gas.
 44. The method of claim 37, wherein thesubstrate is maintained approximately above a thermal decompositiontemperature of the tantalum containing gas.
 45. A method of forming abarrier layer structure and an interconnect structure for use inintegrated circuit fabrication, comprising: providing a substrate havingan oxide layer thereon, wherein the dielectric layer has recesses formedto expose portions of a surface of the substrate; forming at least onetantalum-nitride layer on at least portions of the dielectric layer andthe substrate surface, the at least one tantalum-nitride layer formedusing co-reaction chemisorption of tantalum containing and nitrogencontaining precursor gases; etching through portions of the at least onetantalum-nitride layer disposed within the recesses; and depositing atleast one metal at least in part in the recesses; wherein the at leastone tantalum-nitride layer mitigates to prevents migration of elementsof the at least one metal to the dielectric layer.
 46. The method ofclaim 45, wherein the at least one metal is selected from aluminum (Al),copper (Cu), tungsten (W) or a combination thereof.
 47. The method ofclaim 45, wherein the at least one metal is a refractory metal selectedfrom titanium (Ti), tungsten (W), vanadium (V), niobium (Nb), tantalum(Ta), zirconium (Zr), hafnium (Hf), chromium (Cr), and molybdenum (Mo).48. A software routine on a computer storage media, the softwareroutine, when executed, capable of causing a general purpose computer tocontrol a process system to perform a method of thin film depositioncomprising: forming a tantalum-nitride layer, the tantalum-nitride layerformed using co-reaction chemisorption of tantalum containing andnitrogen containing precursor gases at a temperature of less than about300° C.
 49. The software routine of claim 48, further comprising:providing an annealing plasma after forming the tantalum-nitride layer.50. The software routine of claim 48, wherein the nitrogen containingprecursor is a nitrogen plasma gas source.